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Side Events: public workshops & consortium meetings
Friday June 9th will be dedicated to RISC-V and open source hardware side events, e.g. public workshops or private consortium meetings.
Extra registration required
Participation to one or several side events requires registration for Friday 9th, and payment of the associated fees to covers breaks and lunch.
Side events schedule and location
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Side Events Details
EU Pilot CM
Private meeting: EU Pilot Consortium Meeting.
This is a private meeting restricted to EUPILOT consortium members.
EU Pilot WS
Open workshop: EU Pilot: Towards European hardware & software for HPC.
The purpose of this workshop is to give a platform for EUPILOT members to share and disseminate technical developments on the project’s hardware, software and systems.
Orshin
Open workshop: ORSHIN – Open-source ReSilient Hardware and software for Internet of thiNgs.
The primary goal of the ORSHIN project is to create a generic and holistic methodology, which we call the ‘trusted life cycle’ to develop and manage connected devices based on open-source hardware. We identified a chain of six essential phases: Design, Implementation, Evaluation, Installation, Maintenance, and Retirement. The life cycle will specify how to translate abstract security goals (e.g., build a secure IoT product) into security policies for the phases, and further into concrete security requirements for the building blocks of the product (e.g., use 128-bit keys). More: https://horizon-orshin.eu
Participation in the WS itself is free of charge, but registration for the Friday 9 Side Events is required to cover the costs of breaks and lunch.
RISER WS
Open workshop: RISC-V for Cloud Services.
What is missing, if anything, for RISC-V to become a viable choice for Cloud services?
This workshop aims to facilitate a critical examination of this question, with particular focus on relevant developments within Europe.
Invited speakers will provide an up-to-date outlook on the RISC-V ecosystem and its rapid evolution, covering standardization developments as well as ongoing research and innovation activities within Europe, particularly from a set of concurrently running projects funded by the EU under the proposal call on “Open source for cloud-based services”. The workshop will also host a panel to elicit further insights and concrete action lines for further enhancements of RISC-V technology in support of Cloud services.
Web site: RISER project. Mail: Workshop RISER 2023.
Participation in the WS itself is free of charge, but registration for the Friday 9 Side Events is required to cover the costs of breaks and lunch.
- 13:20-13:30 Welcome & Agenda, Manolis Marazakis (FORTH)
- 13:30-14:20 Invited talks #1, #2 (25’ each, incl. Q&A)
- RISC-V status & outlook, Mark Himelstein (RISC-V International)
- Perspective on open source for cloud-based services, Luis Busquets (DG CNECT)
- 14:20-15:00 Overviews of recently started EU-funded projects (10’ each, incl. Q&A)
- AERO: Accelerated European Cloud, Dionysios Pnevmatikatos (ICCS), Juan Fumero (U. Manchester)
- OpenCUBE: Open-Source Cloud-Based Services on EPI Systems, Ivy Bo Peng (KTH)
- RISER: RISC-V for Cloud Services, Manolis Marazakis (FORTH)
- Vitamin-V: Virtual Environment and Tool-Boxing for Trustworthy Development of RISC-V Based Cloud Services, Ramon Canal (UPC)
- 15:00-15:30 Break (30’) – same timeslot as all workshops
- 15:30-15:55 Invited talk #3 (25’, incl. Q&A)
- Perspective on Cloud for Space and Related Developments in the METASAT Project, Leonidas Kosmidis (BSC)
- 15:55-16:55 Panel
- Enhancements of RISC-V technology in support of Cloud services (viewpoints by speakers & audience)
- 16:55-17:00 Recap - End of workshop session
Red RISC-V
Open Workshop (in Spanish): Kickoff meeting for the second edition of Red-RISCV.
Red-RISCV is a Spanish research, training and innovation network that targets new open architectures, with a focus on RISC-V. Its goal is to ensure that researchers, teachers, students and professionals join the momentum of this new emerging technology, that still lacks a critical mass of qualified personnel, development infrastructure and application. To do so, the aim is to bring together a critical mass of groups and individuals and to set a roadmap that projects our environment towards a sustainable ecosystem around RISC-V and open-source HW/SW.
This meeting will mark the beginning of the second edition of the network and will feature a discussion regarding its tasks and duties, a technical talk, and a panel on financing opportunities in Spain within the PERTE program.
Being a local meeting, sessions will be held in Spanish.
- 08:30 – Red-RISCV: Breve introducción, resumen de la edición anterior y Presentación de la nueva propuesta recientemente aprovada. Espacio de análisis y propuestas para el desarrollo y ejecución de la nueva edición de Red-RISCV.
- 09:45 – Ponencia invitada: “Open hardware to build trusted and verifiable chips“ Piedad Brox Jiménez, Instituto de Microelectrónica de Sevilla (CSIC / Universidad de Sevilla)
- 10:30 – Pausa-café
- 11:00 – Mesa redonda sobre “El estado del PERTE-Chip,
expectativas, oportunidades y dificultades en formación,
investigación e innovación”. Moderador: José Luis Bosque de
Univ. de Cantabria (Coordinador de Red-RISCV).
Ponentes:
- Teresa Riesgo (Secretaria General de Innovación del MICIN)
- Jaime Martorell (Comisionado para el PERTE-Chip)
- Pedro Mier (Presidente de AMETIC)
- Mateo Valero (Director del BSC-CNS)
- Luis Fonseca (Director del IMB-CNM-CSIC)
- 12:30 – Conclusiones y cierre de la jornada
- 12:40 – Comida
FOSSi Foundation & Tiny Tapeout
Open workshop: Open Source Chips with Open Source Tools
This workshop will demonstrate the advances and recent developments of Open Source PDKs and tapeouts of open source chips with open source tools.
Sessions:
- Recent highlights in open source chip design and tapeouts, Matt Venn
- Tiny Tapeout workshop, Matt Venn
- tbd, Frank Vater
- FOSSi Foundation helps building open source ecosystems, Stefan Wallentowitz
Participation to the meeting is free of charge, but registration for the Friday 9 Side Events is required to cover the costs of breaks and lunch.
Also, please register your attendance here, so that we can share more details about the workshop with you: Sign-Up for event updates.
OpenHW Group WS
Open workshop: Open-Source Hardware Basic Training.
This course will cover basic training for open-source hardware development. It is open to members of the Tristan KDT project as well as to the general public. The following topics will be covered during the course:
- Creating Open-Source Projects on GitHub with OpenHW Group.
- How to contribute new features to existing OpenHW projects.
- How to run simulations on existing OpenHW CORE-V cores within the CVE2, CVE4 and CVA6 families using core-v-verif.
- How to develop new test programs to run on existing OpenHW CORE-V cores using core-v-verif.
- Case Study of a new High Performance L1 Data-Cache IP block.
Participation in the WS itself is free of charge, but:
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It is required to register for the Friday 9 Side Events to cover the costs of breaks and lunch.
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In order to assess the size of the audience, please also indicate your intention to participate by filling in this form.
OpenHW TWG TG
Open workshop: OpenHW Group Meetings for Technical Working Groups (TWG) & Task Groups (TG).
OpenHW Technical Working Group and Task Group meetings. Open to OpenHW members and the general public.
Detailed agenda TBD.
Participation to the meeting is free of charge, but registration for the Friday 9 Side Events is required to cover the costs of breaks and lunch.
Tristan PMB
Private meeting: Tristan Project Management Board (PMB).
Tristan Project Management Board (PMB) meeting.
Participation to the meeting is free of charge, but registration for the Friday 9 Side Events is required to cover the costs of breaks and lunch.