Side events on Friday 12th: workshops & consortium meetings
The final day of the RISC-V Summit Europe week is dedicated to project meetings and workshops.
Project meetings and public workshops
After four days of updates on the global RISC-V ecosystem, Friday 12th is the perfect opportunity to propose your own workshop or to hold the regular meeting of your research consortium.
— Advancing RISC-V Adoption in HPC and Cloud Environments
Organized by FORTH. Contact: Manolis Marazakis.
Introduction
The goal of this workshop is to continue building the community of RISC-V in HPC and Cloud computing, particularly in Europe, with involvement and interaction among domain scientists, tool developers, supercomputer operators, and cloud service providers. The workshop aims to provide a forum to share experiences, success stories, and future outlook for the adoption of RISC-V technologies in the context of HPC/Cloud/AI convergence and the computing continuum. The program will consist of invited presentations from ongoing research and innovation projects, each with its own particular focus on aspects of end-to-end sovereign stacks that eliminate single points of technological dependency while fostering innovation through open standards and collaboration.
Program
- 09h30-09h40: Workshop introduction
- 09h40-10h30: Exploring next generation of vector architectures with hardware-software co-design in the DARE project — Teresa Cervero and Paul Carpenter, BSC
- 10h30-11h00: RISC-V Accelerators: Experiences from the European PILOT Project — Carlos Puchol, BSC.
- 11h00-11h15: STXMOD SoC Overview — Norbert Schuhmann, Fraunhofer IIS & ITWM.
- 11h15-11h45: Coffee break
- 11h45-12h15: Integration of RISC-V Security Standards in the HIGHER Project — Nick Kossifidis, FORTH
- 12h15-12h45: Composable Heterogeneous Edge Infrastructure in CAPE: From Edge AI to RISC-V Acceleration — Christian Klarhorst , Bielefeld University
- 12h45-13h15: An Operating System for RISC-V based SSD Controllers — Philippe Bonnet, University of Copenhagen
- 13h15-13h45: Lunch break
- 13h45-14h15: Exploiting RISC-V Vector Processors for HPC and Cloud Workloads: Experiences from the OpenCUBE Project — Ivy Peng, KTH
- 14h15-14h45: Towards European RISC-V Systems: Integration Experiences from the RISER Project — Manolis Marazakis, FORTH
- 14h45-15h00: Post Quantum Cryptography for RISC-V Space Systems — Leonidas Kosmidis, BSC
- 14h30-15h30: Panel on “Alternative futures towards full systems based on open standards“
- 15h45-16h15: Coffee break & end of side event
Additional information about the workshop is available at:
https://www.riser-project.eu/join-us-at-the-risc-v-summit-europe-2026-advancing-risc-v-adoption-in-hpc-and-cloud-environments-workshop/